PIC Microcontroller Test Your Skills and Get Certified Set 1

Abbreviate CISC and RISC


Options are :

  • Complete Instruction Set Computer, Reduced Instruction Set Computer
  • Complex Instruction Set Computer, Reliable Instruction Set Computer
  • Complex Instruction Set Computer, Reduced Instruction Set Computer
  • Complete Instruction Set Computer, Reliable Instruction Set Computer

Answer : Complex Instruction Set Computer, Reduced Instruction Set Computer

What is the order decided by a processor or the CPU of a controller to execute an instruction?


Options are :

  • decode,fetch,execute
  • execute,fetch,decode
  • fetch,decode,execute
  • fetch,execute,decode

Answer : fetch,decode,execute

Unlike micro processors, micro controllers make use of batteries because they have:


Options are :

  • high power dissipation
  • low voltage consumption
  • low power consumption
  • low current consumption

Answer : low power consumption

Microsoft Windows Server 2016 Certification: Exam 70-741 Set 4

Which of the two architecture saves memory?


Options are :

  • Harvard
  • none of the mentioned
  • Von Neumann
  • both of the mentioned

Answer : Von Neumann

Generation of Power-on-reset pulse can occur only after


Options are :

  • the detection of decrement in VDD from 2.1V to 1.5 V
  • the detection of current limiting factor
  • the detection of increment in VDD from 1.5 V to 2.1 V
  • the detection of variable time delay on power up mode

Answer : the detection of increment in VDD from 1.5 V to 2.1 V

A micro controller at-least should consist of


Options are :

  • CPU,RAM, ROM, I/O devices, serial and parallel ports and timers
  • CPU, ROM, I/O devices and timers
  • RAM, ROM, I/O devices, serial and parallel ports and timers
  • CPU,RAM, ROM, I/O devices, serial and parallel ports and timers

Answer : CPU,RAM, ROM, I/O devices, serial and parallel ports and timers

Microsoft Windows Server 2016 Certification: Exam 70-741 Set 4

How is the performance and the computer capability affected by increasing its internal bus width?


Options are :

  • it increases and turns better
  • it decreases
  • remains the same
  • internal bus width don’t affect the performance in any way

Answer : it increases and turns better

Which kind of mode is favourable for MCLRpin for indulging in reset operations?


Options are :

  • Power-down mode
  • Any flexible mode
  • Normal mode
  • Sleep mode

Answer : Sleep mode

Where is the exact specified location of an interrupt flag associated with analog-to-digital converter ?


Options are :

  • ADCON0
  • PCLATH
  • ADRES
  • INTCON

Answer : ADCON0

70-646 Pro Windows Server 2008 - Server Administrator Exam Set 1

What is the executable frequency range of High speed (HS) clocking method by using cystal/ ceramic/ resonator or any other external clock source?


Options are :

  • 4-20 MHz
  • 0-4 MHz
  • 5-200 KHz
  • 100kHz- 4 MHZ

Answer : 4-20 MHz

Why are the pulse width modulated outputs required in most of the applications?


Options are :

  • To control average value of output variables
  • None of the above
  • Both a & b
  • To control average value of an input variables

Answer : To control average value of output variables

70-647 Pro Windows Server 2008 Enterprise Administrator Exam Set 3

Which among the below stated reasons is/are responsible for the selection of PIC implementation/design on the basis of Harvard architecture instead of Von-Newman architecture?


Options are :

  • Improvement in bandwidth
  • Independent bus access provision to data memory even while accessing the program memoryÂ
  • Â Instruction fetching becomes possible over a single instruction cycle
  • All of the above

Answer : All of the above

Which condition results in setting the GIE bit of INTCON automatically


Options are :

  • Execution of retfie instruction at the beginning of ISR
  • Execution of retfie instruction at the end of ISR
  • Execution of retfie instruction along with interrupt disable bit
  • Execution of retfie instruction along with interrupt enable bit

Answer : Execution of retfie instruction at the end of ISR

How many types of architectures are available, for designing a device that is able to work on its own?


Options are :

  • 4
  • 2
  • 1
  • 3

Answer : 2

70-662 Microsoft Exchange Server 2010 Configuring Exam Set 1

Which digital operations are performed over the detected mismatch outputs with an intention to generate a single output RB port change output?


Options are :

  • NAND
  • AND
  • OR
  • EX-OR

Answer : OR

Which timer/s possess an ability to prevent an endless loop hanging condition of PIC along with its own on-chip RC oscillator by contributing to its reliable operation ?Â


Options are :

  • Watchdog Timer (WDT)
  • Power-Up Timer (PWRT )
  • All of the above
  • Oscillator Start-Up Timer (OST)

Answer : Watchdog Timer (WDT)

Which architecture is followed by general purpose microprocessors?


Options are :

  • Von Neumann architecture
  • Harvard architecture
  • none of the mentioned
  • all of the mentioned

Answer : Von Neumann architecture

Microsoft Dynamics Expand and Test Your Skills Practice Test Set 2

How do the variations in an average value get affected by PWM period?


Options are :

  • Shorter the PWM period, faster will be the variation in an average value
  • Longer the PWM period, slower will be the variation in an average value
  • Longer the PWM period, faster will be the variation in an average value
  • Shorter the PWM period, slower will be the variation in an average value

Answer : Shorter the PWM period, faster will be the variation in an average value

How many clock pulses are confined by each machine cycle of Peripheral-Interface Controllers?


Options are :

  • 4
  • 12
  • 8
  • 16

Answer : 4

What is the execution speed of instructions in PIC especially while operating at the maximum value of clock rate?Â


Options are :

  • 0.4 ?s
  • 0.1 ?s
  • 0.8 ?s
  • 0.2 ?s

Answer : 0.2 ?s

Microsoft 98-367 & 98-368 Certification Practical Exam Set 2

Which architecture provides separate buses for program and data memory?


Options are :

  • none of the mentioned
  • Harvard architecture
  • all of the mentioned
  • Von Neumann architecture

Answer : Von Neumann architecture

Harvard architecture allows:


Options are :

  • pipe-ling
  • complex architecture
  • separate program and data memory
  • all of the mentioned

Answer : all of the mentioned

Which bit permits to enable (if set) or disable (if cleared) all the interrupts in an INTCON register?


Options are :

  • RBIE
  • TOIE
  • ADIE
  • GIE

Answer : GIE

70-646 Pro Windows Server 2008,Server Administrator Test Set 4

Which operational feature of PIC allows it to reset especially when the power supply drops the voltage below 4V?


Options are :

  • Built-in Power-on-reset
  • None of the above
  • Brown-out resetÂ
  • Both a & b

Answer : Built-in Power-on-reset

When does it become feasible for portB pins (RB4 to RB7) to support its unique feature of ‘interrupt on change’?


Options are :

  • By configuring any one of the pins as outputs
  • By configuring all the pins (RB4-RB7) as inputs
  • By configuring any one of the pins as inputs
  • By configuring all the pins (RB4-RB7) as outputs

Answer : By configuring all the pins (RB4-RB7) as inputs

Which flags are more likely to get affected in status registers by Arithmetic and Logical Unit (ALU) of PIC 16 CXX on the basis of instructions execution?


Options are :

  • All of the above
  • Zero (Z) Flags
  • Carry( C) Flags
  • Digit Carry (DC) Flags

Answer : All of the above

70-646 Pro Windows Server 2008 - Server Administrator Exam Set 3

Which among the below specified major functionalities is/are associated with the programmable timers of PIC? A. Excogitation of Inputs B. Handling of Outputs C. Interpretation of internal timing for program execution D. Provision of OTP for large and small production runs


Options are :

  • Only C
  • A, B & CÂ
  • A ,B & DÂ
  • C & D

Answer : A, B & CÂ

What would be the value of ADC clock source, if both the ADC clock bits are selected to be '1'?


Options are :

  • FOSC / 32
  • FOSC / 2
  • FOSC / 8
  • FRC

Answer : FRC

Which architecture involves both the volatile and the non volatile memory?


Options are :

  • all of the mentioned
  • Von Neumann architecture
  • none of the mentioned
  • Harvard architecture

Answer : Harvard architecture

70-662 Microsoft Exchange Server 2010 Configuring Exam Set 2

Which micro controller don’t match with its architecture below?


Options are :

  • ARM9- Harvard
  • ARM7- Von Neumann
  • MSP430- Harvard
  • Microchip PIC- Harvard

Answer : MSP430- Harvard

Which form of clocking mechanism is highly efficient and reliable for crystal or ceramic clock sources for operating at the range of 5- 200 kHz in PIC?


Options are :

  • RC
  • LP (Low-Power Clocking)
  • HS (High Speed)
  • XT

Answer : LP (Low-Power Clocking)

70-647 Pro Windows Server 2008 Enterprise Administrator Exam Set 2

Which among the CPU registers of PIC 16C6X/7X is not 8-bit wide?


Options are :

  • Program Counter Low Byte (PCL) Register
  • Program Counter Latch (PCLATH) Register
  • Status Register
  • File Selection Register (FSR)

Answer : Program Counter Latch (PCLATH) Register

How are micro controllers classified on the basic of internal bus width?


Options are :

  • 8,16 bits
  • 8,16,32,64 bits
  • 4,16,32 bits
  • 4,8,16,32 bits

Answer : 4,8,16,32 bits

Why most of the DSPs use Harvard architecture?


Options are :

  • none of the mentioned
  • both of the mentioned
  • they provide more predictable bandwidth
  • they provide greater bandwidth

Answer : both of the mentioned

70-515 Web Applications Development with Microsoft .NET Exam Set 1

What happens when the supply voltage falls below 4V during the power-up timer delay of 72ms in PIC ?


Options are :

  • PIC does not remain in BOR mode until the voltage increases irrespective of stability
  • CPU resets PIC once again in BOR mode
  • BOR reset mode gets disabled
  • Power-up timer kills 72ms more again

Answer : CPU resets PIC once again in BOR mode

Which bit of OPTION register has a potential to decide the falling or rising edge sensitivity for the external interrupt INT?


Options are :

  • PSA
  • RBPU
  • INTEDG
  • RTS

Answer : INTEDG

Which register/s is/are mandatory to get loaded at the beginning before loading or transferring the contents to corresponding destination registers ?


Options are :

  • Zero (Z) Flags
  • Digit Carry (DC) Flags
  • All of the above
  • Carry( C) Flags

Answer : Carry( C) Flags

Microsoft 70-647 Windows Enterprise Administrator Exam Set 5

What is the rate of power up delay provided by an oscillator start-up timer while operating at XT, LP and HS oscillator modes?


Options are :

  • 1024 cycles
  • 2048 cycles
  • 4096 cycles
  • 512 cycles

Answer : 1024 cycles

Which condition/s of MCLR (master clear) pin allow to reset the PIC?


Options are :

  • Low
  • All of the above
  • Moderate
  • High

Answer : Low

Which among the below specified registors are addressable only from bank1 of RFS ?


Options are :

  • ADCON0 (07H)
  • FSR(04H)
  • PORTB (06H)
  • PORTA (05H)

Answer : PORTA (05H)

PIC Microcontroller Test Your Skills and Get Certified Set 1

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